ngc 1.5.0
 
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Classes | Macros | Typedefs | Enumerations
ngcdrv_pci.h File Reference
#include <linux/module.h>
#include <linux/init.h>
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/compat.h>
#include <linux/errno.h>
#include <linux/types.h>
#include <linux/major.h>
#include <linux/vmalloc.h>
#include <linux/fs.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/sched/signal.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/poll.h>
#include <linux/delay.h>
#include <linux/ioport.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <asm/atomic.h>
#include "ngcdrv_tcb.h"
#include "ngcdrv.h"

Go to the source code of this file.

Classes

struct  ngcdrv_state_t
 
struct  ngcdrv_descr_t
 
struct  ngcdrv_work_t
 
struct  ngcdrv_ipp_t
 
struct  ngcdrv_com_t
 
struct  ngcdrv_dma_t
 
struct  ngcdrv_t
 

Macros

#define NGCDRV_GFP   GFP_KERNEL
 
#define NGCDRV_MINOR2INST(minor)
 
#define NGCDRV_MINOR2SUBDEV(minor)
 
#define NGCDRV_MINOR(instance, i)
 
#define NGCDRV_PCI_VENDOR_ID   0x10ee
 
#define NGCDRV_PCI_DEVICE_ID   0x5043
 
#define NGCDRV_BTYPE_XILINX_PCI   0x1111
 
#define NGCDRV_BTYPE_XILINX_PCIE   0x0007
 
#define NGCDRV_WRAP_CNT   0xffffffff
 
#define NGCDRV_INC(x)
 
#define NGCDRV_DEC(x)
 
#define NGCDRV_DIFF(x, a, b)
 
#define NGCDRV_CFG_REG_SIZE   256
 
#define NGCDRV_NUM_CHAN   4
 
#define NGCDRV_REG_CTRL   0x1C
 
#define NGCDRV_REG_CTRL_X1   0x2C
 
#define NGCDRV_REG_CTRL_X2   0x3C
 
#define NGCDRV_REG_CTRL_X3   0x4C
 
#define NGCDRV_REG_STAT   0x14
 
#define NGCDRV_REG_STAT_X1   0x24
 
#define NGCDRV_REG_STAT_X2   0x34
 
#define NGCDRV_REG_STAT_X3   0x44
 
#define NGCDRV_REG_FIFO   0x10
 
#define NGCDRV_REG_FIFO_X1   0x20
 
#define NGCDRV_REG_FIFO_X2   0x30
 
#define NGCDRV_REG_FIFO_X3   0x40
 
#define NGCDRV_CTRL_CLRCOM   0x00000001
 
#define NGCDRV_CTRL_CLRDMA   0x00000002
 
#define NGCDRV_CTRL_TRANSFER   0x00000010
 
#define NGCDRV_CTRL_RESET   0x00008000
 
#define NGCDRV_DMA_REG_DESCR   0x90
 
#define NGCDRV_DMA_REG_CMD   0xA8
 
#define NGCDRV_DMA_REG_IRQ   0x68
 
#define NGCDRV_DMA_REG_LCNT   0xA4
 
#define NGCDRV_DMA_REG_CHAN   0xC4
 
#define NGCDRV_DMA_DESCR_EOC   0x2
 
#define NGCDRV_DMA_DESCR_INTR   0x4
 
#define NGCDRV_DMA_CMD_START   0x0002
 
#define NGCDRV_DMA_CMD_ABORT   0x0004
 
#define NGCDRV_DMA_CMD_INTR_CLR   0x0008
 
#define NGCDRV_DMA_CMD_LCNT_MODE   0x0100
 
#define NGCDRV_DMA_CMD_LCNT_STOP   0x0200
 
#define NGCDRV_DMA_CMD_LCNT_CLR   0x0400
 
#define NGCDRV_DMA_IRQ   (1<<21)
 
#define NGCDRV_DMA_REG_FIFO   NGCDRV_REG_CTRL
 
#define NGCDRV_DMA_FIFO_CLR   NGCDRV_CTRL_CLRDMA
 
#define NGCDRV_DMA_MAX   PAGE_SIZE
 
#define NGCDRV_DMA_KERNEL   0
 
#define NGCDRV_DMA_USER   1
 
#define NGCDRV_USE_VAR(x)
 
#define NGCDRV_IRQ_SHARED   IRQF_SHARED
 

Typedefs

typedef uint8_t ngcdrv_reg_t
 

Enumerations

enum  ngcdrv_minors {
  COM_MINOR = 0 , COMX1_MINOR , COMX2_MINOR , COMX3_MINOR ,
  DMA_MINOR
}
 

Detailed Description

Copyright
SPDX-FileCopyrightText: 2026 European Southern Observatory (ESO) SPDX-License-Identifier: LGPL-3.0-only

Macro Definition Documentation

◆ NGCDRV_BTYPE_XILINX_PCI

#define NGCDRV_BTYPE_XILINX_PCI   0x1111

XILINX PCI

◆ NGCDRV_BTYPE_XILINX_PCIE

#define NGCDRV_BTYPE_XILINX_PCIE   0x0007

XILINX PCIexpress

◆ NGCDRV_CFG_REG_SIZE

#define NGCDRV_CFG_REG_SIZE   256

Size of register mapping area

◆ NGCDRV_CTRL_CLRCOM

#define NGCDRV_CTRL_CLRCOM   0x00000001

clear COM-FIFOs

◆ NGCDRV_CTRL_CLRDMA

#define NGCDRV_CTRL_CLRDMA   0x00000002

clear DMA-FIFOs

◆ NGCDRV_CTRL_RESET

#define NGCDRV_CTRL_RESET   0x00008000

reset interface board

◆ NGCDRV_CTRL_TRANSFER

#define NGCDRV_CTRL_TRANSFER   0x00000010

transfer enable

◆ NGCDRV_DEC

#define NGCDRV_DEC ( x)
Value:
if(*x==0) {*x=NGCDRV_WRAP_CNT;} else {(*x)--;}
NGCDRV_WRAP_CNT
#define NGCDRV_WRAP_CNT
Definition ngcdrv_pci.h:129

◆ NGCDRV_DIFF

#define NGCDRV_DIFF ( x,
a,
b )
Value:
if(b<a){*x=(NGCDRV_WRAP_CNT-a)+b;}else{*x=b-a;}

◆ NGCDRV_DMA_CMD_ABORT

#define NGCDRV_DMA_CMD_ABORT   0x0004

abort DMA

◆ NGCDRV_DMA_CMD_INTR_CLR

#define NGCDRV_DMA_CMD_INTR_CLR   0x0008

clear DMA interrupt

◆ NGCDRV_DMA_CMD_LCNT_CLR

#define NGCDRV_DMA_CMD_LCNT_CLR   0x0400

clear latency counter

◆ NGCDRV_DMA_CMD_LCNT_MODE

#define NGCDRV_DMA_CMD_LCNT_MODE   0x0100

select latency counter mode

◆ NGCDRV_DMA_CMD_LCNT_STOP

#define NGCDRV_DMA_CMD_LCNT_STOP   0x0200

stop latency counter

◆ NGCDRV_DMA_CMD_START

#define NGCDRV_DMA_CMD_START   0x0002

start DMA

◆ NGCDRV_DMA_DESCR_EOC

#define NGCDRV_DMA_DESCR_EOC   0x2

end of chain bit

◆ NGCDRV_DMA_DESCR_INTR

#define NGCDRV_DMA_DESCR_INTR   0x4

enable terminal count interrupts

◆ NGCDRV_DMA_FIFO_CLR

#define NGCDRV_DMA_FIFO_CLR   NGCDRV_CTRL_CLRDMA

clear DMA FIFOs

◆ NGCDRV_DMA_IRQ

#define NGCDRV_DMA_IRQ   (1<<21)

DMA interrupt bit

◆ NGCDRV_DMA_KERNEL

#define NGCDRV_DMA_KERNEL   0

kernel space DMA

◆ NGCDRV_DMA_MAX

#define NGCDRV_DMA_MAX   PAGE_SIZE

Maximum amount of bytes that can be transferred in one single DMA shot

◆ NGCDRV_DMA_REG_CHAN

#define NGCDRV_DMA_REG_CHAN   0xC4

DMA channel selection register

◆ NGCDRV_DMA_REG_CMD

#define NGCDRV_DMA_REG_CMD   0xA8

DMA command register

◆ NGCDRV_DMA_REG_DESCR

#define NGCDRV_DMA_REG_DESCR   0x90

DMA descriptor register

◆ NGCDRV_DMA_REG_FIFO

#define NGCDRV_DMA_REG_FIFO   NGCDRV_REG_CTRL

DMA FIFO register

◆ NGCDRV_DMA_REG_IRQ

#define NGCDRV_DMA_REG_IRQ   0x68

DMA interrupt request register

◆ NGCDRV_DMA_REG_LCNT

#define NGCDRV_DMA_REG_LCNT   0xA4

DMA latency counter register

◆ NGCDRV_DMA_USER

#define NGCDRV_DMA_USER   1

user space DMA

◆ NGCDRV_GFP

#define NGCDRV_GFP   GFP_KERNEL

GFP allocation flags for DMA buffers

◆ NGCDRV_INC

#define NGCDRV_INC ( x)
Value:
if(*x==NGCDRV_WRAP_CNT) {*x=0;} else {(*x)++;}

◆ NGCDRV_IRQ_SHARED

#define NGCDRV_IRQ_SHARED   IRQF_SHARED

Portable IRQ shared flag

◆ NGCDRV_MINOR

#define NGCDRV_MINOR ( instance,
i )
Value:
((instance << 4) | (i))

Macro to create minor node

◆ NGCDRV_MINOR2INST

#define NGCDRV_MINOR2INST ( minor)
Value:
(minor >> 4)

Macro to convert minor into instance

◆ NGCDRV_MINOR2SUBDEV

#define NGCDRV_MINOR2SUBDEV ( minor)
Value:
(minor & 0x0f)

Macro to convert minor into subdevice

◆ NGCDRV_NUM_CHAN

#define NGCDRV_NUM_CHAN   4

Number of communication channels

◆ NGCDRV_PCI_DEVICE_ID

#define NGCDRV_PCI_DEVICE_ID   0x5043

PCI device-id

◆ NGCDRV_PCI_VENDOR_ID

#define NGCDRV_PCI_VENDOR_ID   0x10ee

PCI vendor-id

◆ NGCDRV_REG_CTRL

#define NGCDRV_REG_CTRL   0x1C

COM-port control register

◆ NGCDRV_REG_CTRL_X1

#define NGCDRV_REG_CTRL_X1   0x2C

COM-port control register

◆ NGCDRV_REG_CTRL_X2

#define NGCDRV_REG_CTRL_X2   0x3C

COM-port control register

◆ NGCDRV_REG_CTRL_X3

#define NGCDRV_REG_CTRL_X3   0x4C

COM-port control register

◆ NGCDRV_REG_FIFO

#define NGCDRV_REG_FIFO   0x10

COM-port FIFO register

◆ NGCDRV_REG_FIFO_X1

#define NGCDRV_REG_FIFO_X1   0x20

COM-port FIFO register

◆ NGCDRV_REG_FIFO_X2

#define NGCDRV_REG_FIFO_X2   0x30

COM-port FIFO register

◆ NGCDRV_REG_FIFO_X3

#define NGCDRV_REG_FIFO_X3   0x40

COM-port FIFO register

◆ NGCDRV_REG_STAT

#define NGCDRV_REG_STAT   0x14

COM-port status register

◆ NGCDRV_REG_STAT_X1

#define NGCDRV_REG_STAT_X1   0x24

COM-port status register

◆ NGCDRV_REG_STAT_X2

#define NGCDRV_REG_STAT_X2   0x34

COM-port status register

◆ NGCDRV_REG_STAT_X3

#define NGCDRV_REG_STAT_X3   0x44

COM-port status register

◆ NGCDRV_USE_VAR

#define NGCDRV_USE_VAR ( x)
Value:
do {(void)(x);} while (0)

Declare a variable as used

◆ NGCDRV_WRAP_CNT

#define NGCDRV_WRAP_CNT   0xffffffff

Typedef Documentation

◆ ngcdrv_reg_t

typedef uint8_t ngcdrv_reg_t

Enumeration Type Documentation

◆ ngcdrv_minors

enum ngcdrv_minors

Device minor numbers

Enumerator
COM_MINOR 
COMX1_MINOR 
COMX2_MINOR 
COMX3_MINOR 
DMA_MINOR